Schematics

layout: schematic reads a figure as a circuit sheet: it seats the parts and hands the wires to the orthogonal router, which lands them on pins, bends square and dots the junctions.

A part, its pins and a net

{ layout: schematic; }

|component#U1| "AMS1117-3.3" [
  |pin#vin| { side: left; number: 3; }
  |pin#gnd| { side: bottom; number: 1; }
  |pin#vout| { side: right; number: 2; }
]
|J#J1| "3V3 OUT" { pins: 2; cell: 2 1; }

U1.vout - J1.p1 "3V3"
vin 3 vout 2 gnd 1 AMS1117-3.3 U1 1 2 3V3 OUT J1 3V3

|component| is the generic pin-bearing box. Its label is the part name and its [ ] holds |pin| children, each drawing two things:

  • The pin’s id, inside the body — vin, gnd, vout.
  • number:, outside beside the stub — the short lead the wire lands on.

|J| is the connector define: pins: 2 generates numbered pins in one column facing the circuit, and cell: 2 1 seats it on the scope’s track grid as an anchor. Without that, a one- or two-pin part is a satellite that hangs off whichever wire touches it — which the next figure relies on.

A wire is an ordinary link, and its label is the net name, stood beside the trace rather than cut into it.

The sheet look arrives with the layout — green wires, pale bodies, muted pin numbers — riding theme variables, so this source paints nothing at all.

Discretes that seat themselves

{ layout: schematic; }

|component#U1| "AMS1117-3.3" [
  |pin#vin| { side: left; number: 3; }
  |pin#gnd| { side: bottom; number: 1; }
  |pin#vout| { side: right; number: 2; }
]
|C#C1| "10u"
|C#C2| "22u"

U1.vin - C1 - |gnd|
U1.vout - C2 - |gnd|
U1.gnd - |gnd|
vin 3 vout 2 gnd 1 AMS1117-3.3 U1 10u C1 22u C2

|C| is a discrete. It arrives with generated pins p1 and p2, its id is its reference designator, and its label is the value.

Nothing here is positioned by hand. One- and two-pin parts are satellites rather than anchors: they take no cell of their own, and seat themselves at the pin their wire touches.

A chain passes through a two-pin part — U1.vin - C1 - |gnd| enters one pin and leaves the other, so the whole decoupling leg is one line.

|gnd| is a built-in label capsule. A ground is drawn with its connection point on top, which is why a chain ending in one grows downward to meet it.

Labels, flags and power nets

{
  layout: schematic;
  |v5::label| { symbol: power; } [ "5V" ]
}

|component#U7| "TMC2300" [
  |pin#vs| { side: left; number: 18; }
  |pin#gnd| { side: bottom; number: 1; }
  |pin#step| { side: right; number: 4; }
  |space|
  |pin#diag| { side: right; number: 11; }
]

U7.vs - |v5|
U7.gnd - |gnd|
U7.step -> "STEP"
U7.diag - "DIAG"
vs 18 step 4 diag 11 gnd 1 TMC2300 U7 5V STEP DIAG

A |label| is its own terminal — no pins and no dot-path — and a one-ended wire mints one, seated at the pin.

The operator’s end marker sets the tag’s shape, and the two above differ for that reason alone:

  • -> draws STEP in a right-pointing flag.
  • - leaves DIAG untagged — and a plain label is a run rather than a stop, so its box is the stretch of trace it names. That is why DIAG is written over a wire instead of at the end of one.

A power net is a one-line define — |v5::label| { symbol: power; } [ "5V" ] — and every |v5| capsule after it is that flag.

The |space| between the two right-hand pins is the gap a datasheet draws between pin groups: no pin, just an empty rail slot, so the two tags have room to stand apart.

A series leg and a junction

{
  layout: schematic;
  |v5::label| { symbol: power; } [ "5V" ]
}

|component#U1| "AMS1117-3.3" [
  |pin#vin| { side: left; number: 3; }
  |pin#gnd| { side: bottom; number: 1; }
  |pin#vout| { side: right; number: 2; }
]
|J#J1| "3V3 OUT" { pins: 2; cell: 2 1; }
|R#R1| "1k"
|LED#D1| "PWR"

U1.vin - |v5|
U1.gnd - |gnd|
U1.vout - J1.p1 "3V3"
U1.vout - R1 - D1 - |gnd|
J1.p2 - |gnd|
vin 3 vout 2 gnd 1 AMS1117-3.3 U1 1 2 3V3 OUT J1 1k R1 PWR D1 5V 3V3

Two statements naming U1.vout make a junction there rather than a pass-through, and the router dots the fork where three wire ends meet.

The second is a series chain — U1.vout - R1 - D1 - |gnd| — through the resistor and the LED, each entered on one pin and left on the other. The chain hangs off the wire leaving the pin and grows toward its ground.

Both discretes carry ids on purpose: a minted reference designator is display-only, so give a part a name when you need to wire it.

The type is the reference family — |R|, |C|, |L|, |D|, |LED|, |Q|, |SW| and the rest — and symbol: picks a variant, so |Q| { symbol: pnp } swaps the transistor.

The whole part family

Passives 10k R1 10k R2 10k R3 100n C1 47u C2 4u7 L1 600R FB1 1A F1 16M Y1 Diodes 1N4148 D1 5V1 D2 SS34 D3 SMAJ24 D4 green D5 Transistors BC847 Q1 BC857 Q2 2N7002 Q3 DMP2 Q4 TLV9061 U1 BC847 Q5 Sources & switches 5V V1 230V V2 20m I1 20m I2 3V BT1 12V BT2 ON SW1 RST SW2 Electromechanical 5V fan M1 85dB BZ1 VBUS TP1 Net tags NRST TX RX SDA CLK VBUS RF Grounds 
// The schematic part family, at one glance — every discrete, every `symbol:`
// variant, every net-tag shape. Nothing is wired: a schematic scope places
// anchors on its own **track grid**, so `cell: c r` (ordinal, empty tracks
// collapsing) lays the catalogue out row by row. The smart label is a part's
// **value**; its id is drawn verbatim as the reference designator, and an
// anonymous part mints a display-only one from its type — R1, C1, D1…
{
  layout: schematic; gap: 40;
  // A row header is an ordinary box on the track grid — a `|caption|` would
  // pin itself out of the flow and take no cell [SPEC 5].
  |head::block| { font-size: 13; color: --muted; padding: 0 8; }
}

// The potentiometer is a three-terminal `|R|`: its wiper `w` stands on the
// body's own centre x, the two ends on its centre y [SPEC 16.3].
|head| "Passives" { cell: 1 1; }
|R#R1| "10k" { cell: 2 1; }
|R#R2| "10k" { cell: 3 1; symbol: pot; }
|R#R3| "10k" { cell: 4 1; symbol: ntc; }
|C#C1| "100n" { cell: 5 1; }
|C#C2| "47u" { cell: 6 1; symbol: polarized; }
|L#L1| "4u7" { cell: 7 1; }
|FB#FB1| "600R" { cell: 8 1; }
|F#F1| "1A" { cell: 9 1; }
|Y#Y1| "16M" { cell: 10 1; }

|head| "Diodes" { cell: 1 2; }
|D#D1| "1N4148" { cell: 2 2; }
|D#D2| "5V1" { cell: 3 2; symbol: zener; }
|D#D3| "SS34" { cell: 4 2; symbol: schottky; }
|D#D4| "SMAJ24" { cell: 5 2; symbol: tvs; }
|LED#D5| "green" { cell: 6 2; }

// One ring for every three-terminal body: the FETs wear the BJT's.
|head| "Transistors" { cell: 1 3; }
|Q#Q1| "BC847" { cell: 2 3; }
|Q#Q2| "BC857" { cell: 3 3; symbol: pnp; }
|Q#Q3| "2N7002" { cell: 4 3; symbol: nfet; }
|Q#Q4| "DMP2" { cell: 5 3; symbol: pfet; }
|opamp#U1| "TLV9061" { cell: 6 3; }
// A flip is a pose too [SPEC 16.1]: `mirror: x-axis` swaps the collector and
// emitter rows, the way a sheet stands a high-side transistor.
|Q#Q5| "BC847" { cell: 7 3; mirror: x-axis; }

|head| "Sources & switches" { cell: 1 4; }
|V#V1| "5V" { cell: 2 4; }
|V#V2| "230V" { cell: 3 4; symbol: ac; }
|I#I1| "20m" { cell: 4 4; }
|I#I2| "20m" { cell: 5 4; symbol: ac; }
|BT#BT1| "3V" { cell: 6 4; }
|BT#BT2| "12V" { cell: 7 4; symbol: battery; }
|SW#SW1| "ON" { cell: 8 4; }
|SW#SW2| "RST" { cell: 9 4; symbol: push; }

// A `|TP|` carries one pin — legal, and what a probe pad is [SPEC 16.2].
|head| "Electromechanical" { cell: 1 5; }
|M#M1| "5V fan" { cell: 2 5; }
|BZ#BZ1| "85dB" { cell: 3 5; }
|TP#TP1| "VBUS" { cell: 4 5; }

// A `|label|` is its own terminal — the net tag. `symbol:` swaps in a drawing
// from the schematic set; `shape:` picks the outline the text rides in.
|head| "Net tags" { cell: 1 6; }
|label| "NRST" { cell: 2 6; }
|label| "TX" { cell: 3 6; shape: right; }
|label| "RX" { cell: 4 6; shape: left; }
|label| "SDA" { cell: 5 6; shape: both; }
|label| "CLK" { cell: 6 6; shape: round; }
|label| "VBUS" { cell: 7 6; symbol: power; }
|label| "RF" { cell: 8 6; symbol: antenna; }

|head| "Grounds" { cell: 1 7; }
|gnd| { cell: 2 7; }
|label| { cell: 3 7; symbol: earth; }
|label| { cell: 4 7; symbol: chassis; }
|nc| { cell: 5 7; }

Every discrete, every symbol: variant and every net-tag shape, on one sheet. Nothing there is wired — a schematic scope places its anchors on a track grid, so cell: c r lays a catalogue out row by row exactly as it seats a part in a circuit.

Two things worth noticing in it:

  • The smart label is the part’s value, and its id is drawn verbatim as the reference designator. An anonymous part mints a display-only one from its type — R1, C1, D1 — which is the rule the section above leaned on.
  • A pose is a property. mirror: x-axis on the last transistor swaps its collector and emitter rows, the way a sheet stands a high-side part.

Go deeper

The full schematic reference covers the discrete families and their variants, the track grid and cell:, rotation, label shapes and the wire laws.